Another one of TechSAT’s firsts – AFDX®/ARINC 664 ES simulation since integration testing of the A380

TechSAT’s AFDX-PMC-2G is a powerful AFDX®/ARINC 664 interface implemented on a PMC (PCI Mezzanine Card) form factor module. It implements the Airbus and Boeing AFDX® protocol stack in on-board firmware and FPGA logic thereby offloading the host.

AFDX-PMC-2G is equipped with two full duplex AFDX® networks that can be operated in either independent or dual-redundant mode. The AFDX-PMC-2G connector is a twisted pair copper interface.

In addition to the AFDX® protocol stack, the AFDX-PMC-2G also implements comprehensive test features such as error detection and filtering. Optimized for performance, the AFDX-PMC-2G is ideal for applications such as AFDX® End System (ES) testing and validation, ES simulation, and ARINC 615A data loading via AFDX®.

Use Cases
  • AFDX® End System (ES) testing and validation
  • ES simulation
  • ARINC 615A data loading via AFDX®
  • Cost-effective solution for non-flightworthy applications
  • Airbus and Boeing AFDX® compliant protocol stack
  • Gateway functionality with ADS2 software
Key Features
  • On-board AFDX® protocol stack implementation
  • Two full duplex AFDX® networks that can be operated in either independent or dual-redundant mode
  • Comprehensive error detection and filtering
  • Applicable on PCI, cPCI, PXI, PCIe, and VME hardware platforms
  • Driver and API support for Windows, Linux, and VxWorks

Technical Data

  • Applicable on PCI, cPCI, PXI, PCIe, and VME platforms
  • 32 bit @ 33/66 MHz PCI-bus interface
  • Compliant with Airbus and Boeing AFDX® protocol
  • Optional support for EDE protocol (only Boeing compliant AFDX® protocol)
  • Time synchronization to TechSAT Timemaster
  • Twisted pair transceivers
  • Auto-negotiation or fixed 10/100 Mbps transmit rate
  • 10/100 Mbps receive rate
  • 8 TTL inputs and 8 TTL outputs
  • Down to 500 μs BAG configuration
  • Command FIFOs
Transmission & Reception
  • Traffic shaping via VL and BAG configuration
  • Integrity checking and redundancy management
  • Up to 253 transmit VLs
  • Up to 1024 ports per VL
  • Up to 510 receive VLs
  • Virtual Links (VL) and Sub-VL
  • 1 μs Rx frame timestamp resolution
  • Transmit and receive statistics
  • UDP and IP protocol including IP fragmentation and re-assembly
  • AFDX addressing with multicast or unicast addresses
  • Sampling and queuing ports for transmit and receive
  • Autonomously scheduled transmissions
  • TAP capable
Error Detection
  • CRC, IFG, short preamble, and nibble errors
  • RSN detection enabled/disabled
  • Wrong Ethernet type
  • SDK with C API, Python 2.6 API, and driver available for the following platforms:
    • Windows® 7 32 bit/64 bit
    • CentOS 5 32 bit/64 bit
    • CentOS 6 32 bit/64 bit
    • CentOS 7 64 bit only
    • VxWorks 5.5
    • Drivers for other platforms on request
  • LabVIEW VIs available on request
  • Optional software tools for test, simulation, and data loading
Physical Dimensions
  • Size: 74 mm x 149 mm x 13.5 mm
Operating Environment
  • Operating temperature: 0 °C to 55 °C
  • Storage temperature: -40 °C to 70 °C
  • Humidity: 5% to 90% non-condensing
Power Consumption
  • max. 7.5 W
Part Number
  • 702348-02